Interconnects are utilized to carry signals from one portion of a microcircuit to another portion of the microcircuit. All circuits have a delay associated with them. A portion of this delay is due to the interconnects, which introduce a delay when transmitting a signal from one component in the circuit to another. The delay introduced by an interconnect is related to the geometry of the interconnect, the resistance of the interconnect, the load on the interconnect, the capacitance of the interconnect to ground, and any coupling between the interconnect and other structures or interconnects in the circuit. For example, the delay due to the capacitance of the interconnect is related to the time taken to charge or discharge the capacitance. The delay due to the interconnect also relates to the voltage input to the interconnect, the resistance of the interconnect and the driving current of the transistor charging or discharging the interconnect. It any microcircuit, a reduction of the delay is beneficial to performance. Thus, it is desirable to minimize the delay introduced by interconnects.
When designing a logic circuit, the structure for and position of interconnects in the logic circuit are generally determined automatically by a router. Typically, the pitch, and width of an interconnect as well as the separation between interconnects are assigned by the router. The pitch is sum of the width of an interconnect and the space between interconnects. The width of each interconnect is typically fixed. Using the fixed width of each interconnect, the position and length of each interconnect, as well as the separation between each interconnect can be determined. The circuit can then be fabricated using the output of the router.
Because the width of the interconnect is fixed, the delay introduced due to the interconnect can be reduced. In order to reduce delays due to interconnects, conventional systems try to minimize interconnect length, and consequently, indirectly try to reduce the contribution of delay due to interconnect. What is needed to reduce this delay are more flexible routers which can also vary the width of interconnect lines. The present invention addresses such a need.